1. Field of the Invention
The present invention relates to a method for manufacturing a liquid crystal display (LCD) device, and more particularly, to an In-Plane Switching (IPS) mode LCD device having improved transmittance and viewing angle.
2. Discussion of the Related Art
Demands for various display devices have increased with development of an information based society. Accordingly, many efforts have been made to research and develop various flat display devices, such as liquid crystal display (LCD) devices, plasma display panel (PDP) devices, electroluminescent display (ELD) devices, and vacuum fluorescent display (VFD) devices. Some versions of flat display devices have already been implemented into displays for various equipment.
Among the various flat display devices, liquid crystal display (LCD) devices have been most commonly used due to advantageous characteristics, such as thin profile, light weight, and low power consumption, whereby the LCD devices provide a substitute for Cathode Ray Tube (CRT) devices. In addition to mobile type LCD devices, such as a notebook computer display, LCD devices have also been developed for computer monitors and televisions for receiving and displaying broadcasting signals.
Despite various technical developments in the LCD technology, research in enhancing the picture quality of the LCD device has been, in some respects, lacking as compared to other features of the LCD device. The key to developing LCD devices for wide use depends on whether LCD devices can implement a high quality picture, including high resolution and high luminance with a large-sized screen, while still maintaining a light weight, thin profile, and low power consumption.
FIG. 1 is an exploded perspective view an LCD device according to the related art. As shown in FIG. 1, the LCD device is comprised of a first substrate 1 and a second substrate 2 facing each other, and a liquid crystal layer 3 formed between the first and second substrates 1 and 2 by injection of liquid crystal. The first substrate (i.e., TFT array substrate) 1 includes a plurality of gate lines 4 arranged along a first direction at fixed intervals, a plurality of data lines 5 arranged along a second direction perpendicular to the first direction at fixed intervals, a plurality of pixel electrodes 6 arranged in a matrix-type configuration within pixel regions P defined by crossing of the gate and data lines 4 and 5, and a plurality of thin film transistors T operating via signals supplied to the gate lines 4 for transmitting signals from the data lines 5 to the pixel electrodes. The second substrate (color filter array substrate) 2 includes a black matrix layer 7 that prevents light from portions of the first substrate 1 except at the pixel regions P, an R/G/B color filter layer 8 for displaying various colors, and a common electrode 9 for producing the image.
In the above LCD device, liquid crystal molecules of the liquid crystal layer 3 formed between the first and second substrates 1 and 2 are aligned by an electric field induced between the pixel electrode 6 and the common electrode 9. Thus, transmittance of light passing through the liquid crystal layer 3 is controlled by the alignment of liquid crystal layer 3 to display the images. This is commonly referred to as a Twisted Nematic (TN) mode LCD device, which has a problem of a narrow viewing angle. To overcome this problem of the TN mode LCD device, an In-Plane Switching (IPS) mode LCD device has been developed. In an IPS mode LCD device, the pixel electrode and the common electrode are formed in parallel on the pixel region of the first substrate whereby a transverse electric field parallel to the two substrates is generated so as to align the liquid crystal layer.
FIG. 2 is a plan view of an IPS mode LCD device according to the related art, and FIG. 3 is a cross sectional view of an alignment of liquid crystal material along I-I′ of FIG. 2 according to the related art. As shown in FIGS. 2 and 3, the IPS mode LCD device includes first and second substrates 30 and 40. Specifically, the first substrate 30 includes a plurality of gate lines 31 arranged along a first direction at fixed intervals, a plurality of data lines 32 arranged along a second direction perpendicular to the first direction at fixed intervals, a plurality of thin film transistors TFTs formed adjacent crossings of the gate and data lines 31 and 32, and a pixel electrode 33 and a common electrode 35a alternately formed in each pixel region defined by crossing of the gate and data lines 31 and 32.
The thin film transistor TFT includes a gate electrode 31a protruding from the gate line 31, a source electrode 32a protruding from the data line 32, and a drain electrode 32b formed at a predetermined interval from the source electrode 32a. In addition, a semiconductor layer 34 is overlapped with the source and drain electrodes 32a and 32b and covers the gate electrode 31a. Then, a gate insulating layer 36 is formed on an entire surface of the first substrate 30 including the gate line 31. Then, a passivation layer 37 is formed on the gate insulating layer 36, and a passivation hole is defined to expose a predetermined portion of the drain electrode 32b. Through the passivation hole, the pixel electrode 33 is connected with the drain electrode 32b. The gate insulating layer 36 and the passivation layer 37 are formed of an inorganic insulating material at a thickness of 2000 Å (Angstroms) to 4000 Å (Angstroms).
In FIG. 2, the common electrodes 35a and 35b diverge from a common line 35 formed in parallel to the gate line 31 and the common line 35 is overlapped with the pixel electrode 33. The outermost common electrodes 35a formed adjacent to the data line 32 are relatively wider than the common electrode 35b positioned in the center of the pixel region, so as to minimize a space between the adjacent data line 32 and the outermost common electrode 35a. In the case of liquid crystal 50 positioned in the space between the adjacent data line 32 and the outermost common electrode 35a, it is difficult to align the liquid crystal according to a signal voltage applied to the data line 32. In this respect, it is necessary to minimize the space between the adjacent data line 32 and the outermost common electrode 35a. 
In FIG. 2, the second substrate 40 is positioned opposite to the first substrate 30. The second substrate 40 includes a black matrix layer 41 to shield a non-pixel area (i.e., gate and data lines 31 and 32) and the thin film transistor TFT from light, an RGB color filter layer 42 for providing R, G, and B colors corresponding to the respective pixel regions, and an overcoat layer 43 formed on an entire surface including the RGB color filter layer 42.
As shown in FIG. 3, corresponding voltage signals are applied to the common electrodes 35a and 35b and the pixel electrode 33 so as to drive the liquid crystal 50, thereby forming a transverse electric field between the common electrodes 35a and 35b and the pixel electrode 33. Accordingly, a cross talk is generated in the space between the outermost common electrode 35a and the adjacent data line 32, whereby the liquid crystal 50 is aligned slantwise, thereby causing a light leakage in a corresponding viewing angle area.
To prevent the light leakage caused by the crosstalk in the space between the outermost common electrode 35a and the adjacent data line 32, a width of the black matrix layer 41 may be increased. However, increasing the width of the black matrix layer 41 will increase aperture ratio loss.
FIG. 4 is a cross sectional view of alignment of liquid crystal in another IPS mode LCD device according to the related art. As shown in FIG. 4, the data line 32 may be partially overlapped with the outermost common electrode 35a to eliminate space between the data line 32 and the outermost common electrode 35a to prevent the light leakage caused by the crosstalk in the viewing angle area. In FIG. 4, an outermost common electrode 35a is partially overlapped with a data line 32. In this case, it is possible to solve the problem of light leakage. However, a parasitic capacitance of
  C  =      ɛ    ⁢                  ⁢    L    ⁢          x              d        ⁢                                  ⁢        1            is generated in an overlapped area between the data line 32 and the outermost common electrode 35a. Accordingly, it requires a long time to charge the liquid crystal 50 with a pixel voltage, whereby luminance deteriorates and residual images are generated.
The IPS mode LCD device according to the related art has the following disadvantages. If the data line is formed at a predetermined interval from the outermost common electrode, crosstalk is generated in the space between the outermost common electrode and the data line due to the signal voltage applied to the data line, thereby causing light leakage.
If the black matrix layer extends toward the data line so as to prevent the light leakage in the viewing angle area, the aperture ratio deteriorates, thereby lowering its efficiency.
If the data line is partially overlapped with the outermost common electrode so as to prevent the light leakage, the overlapped area has large parasitic capacitance. Accordingly, it requires a long time to charge the liquid crystal with the pixel voltage, whereby luminance deteriorates and residual images are generated. As a result, it is difficult to apply the related art method to a large-sized panel.